Lecture 113: Every Microsecond Matters: Achieving Near Speed-of-Light Latency in GPU Collectives
Summary
The lecture details advanced low-latency collective communication algorithms for GPU clusters, crucial for accelerating large language model (LLM) inference. The core challenge addressed is that traditional global memory synchronization barriers are significant bottlenecks in auto-regressive decoding phases. Solutions involve novel techniques—such as Low Latency (LL) protocols, Sentinel synchronization, and Double Buffering—that replace explicit barriers by using data arrival itself as the synchronization signal. Furthermore, a new `LL128 atomic` algorithm is introduced to achieve highly scalable, low-overhead reduction operations.
Key takeaways
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Latency Bottleneck in LLM Inference
0:53
During auto-regressive decoding (the decode phase), message sizes are small, and the collective operation is executed repeatedly on the critical path. Saving microseconds per AllReduce can lead to substantial end-to-end speedups [0:53].
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Symmetric Memory for Remote Access
1:40
Symmetric memory allows a GPU kernel to directly calculate and address the corresponding location of an object on another participating GPU, simplifying remote device memory access within kernels [1:40].
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Eliminating Global Barriers
2:30
The primary bottleneck in traditional AllReduce algorithms (like OneShot or TwoShot) is the expensive global memory barrier. New techniques replace these barriers by using data arrival as an implicit synchronization signal, trading space for latency [2:36].
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The LL128 Atomic Algorithm
2:55
A novel approach utilizes atomic additions over MVLink to perform reductions directly into a shared destination buffer. This significantly reduces required scratch buffer space and improves scalability for larger numbers of ranks compared to previous methods [4:30].
Technical details
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Collective Communication Phases
15s
Transformer layers involve AllReduce operations. The prefill phase is bandwidth-sensitive (proportional to total sequence length and hidden size), while the decode phase is latency-critical, as message sizes are small and the operation runs repeatedly [0:15].
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Low Latency Synchronization Techniques
190s
Three main techniques eliminate global barriers: 1) **LL Protocol:** Packs data with a flag for atomic writing. 2) **Sentinel Synchronization:** Initializes buffers with a unique sentinel value (e.g., -N), allowing data arrival to signal completion. 3) **Double Buffering/Implicit Sync:** Uses bidirectional communication flow control, where receiving data acts as the 'credit' or synchronization signal for the next iteration [3:50].
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Hardware and APIs
130s
The work leverages hardware features like Symmetric Memory, LSA (Low Store Accessible Memory) over PCIe/MVLink, and advanced interconnects like MVSwitch for multicast operations. The proposed solution is an experimental device-side API built on existing NVIDIA NCCL APIs to abstract these low-latency mechanisms [1:20].
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Performance Benchmarks
300s
Microbenchmarks show that the new low-latency kernels (e.g., OneShot with Sentinel/LL) significantly outperform existing implementations across small and medium message sizes, especially when utilizing multicast capabilities [4:50]. The performance gain translates to measurable cost savings in real-world LLM inference workloads (e.g., $2-$3 per million output tokens for DeepCarOne) [6:15].
Mentioned resources
Channel & topics
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